USPTO Deadlines
Application History
7 events| Date | Code | Type | Description | Documents |
|---|---|---|---|---|
| Jun 26, 2009 | MAB2 | O | ABANDONMENT NOTICE MAILED - FAILURE TO RESPOND | Loading... |
| Jun 26, 2009 | ABN2 | O | ABANDONMENT - FAILURE TO RESPOND OR LATE RESPONSE | Loading... |
| Nov 20, 2008 | GNRN | O | NOTIFICATION OF NON-FINAL ACTION E-MAILED | Loading... |
| Nov 20, 2008 | GNRT | F | NON-FINAL ACTION E-MAILED | Loading... |
| Nov 20, 2008 | CNRT | R | NON-FINAL ACTION WRITTEN | Loading... |
| Nov 20, 2008 | DOCK | D | ASSIGNED TO EXAMINER | Loading... |
| Aug 18, 2008 | NWAP | I | NEW APPLICATION ENTERED | Loading... |
Detailed Classifications
Class 009
Electronic Design Automation (EDA) product for hardware assisted simulation of VHDL and Verilog hardware description language (HDL) designs. The product will co-simulate designs with software on event-by-event basis with RTL simulators. The hardware supports Windows, UNIX and Linux Operating Systems, based on a PCI interface
First Use Anywhere:
Jan 6, 1999
First Use in Commerce:
Jan 6, 1999
Classification
International Classes
009